Wednesday, February 20, 2013

Experiment No.-3 (Value Added)
Aim: Synthesis and simulation of XOR and XNOR gate.
Apparatus Used:-
S.No
Items
Specification
Quantity
1
Computer set
P-4, 2GB DDR
01
2
Software (Tool)
Xilinx 10.1
01
Theory:-
XOR Gate:
The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both, of its two inputs are high. An encircled plus sign ( ) is used to show the EOR operation. 
 
XNOR Gate:
      
The 'Exclusive-NOR' gate circuit does the opposite to the EOR gate. It will give a low output if either, but not both, of its two inputs are high. The symbol is an EXOR gate with a small circle on the output. The small circle represents inversion.
 
HDL Coding:
EX-OR Gate implementation:-
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity EXORGATE is
Port ( A : in STD_LOGIC;
B : in STD_LOGIC;
Y : out STD_LOGIC);
end EXORGATE;
architecture Behavioral of EXORGATE is
begin
Y<= A XOR B;
end Behavioral;
EX-NOR Gate implementation:-
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity EXNORGATE is
Port ( A : in STD_LOGIC;
B : in STD_LOGIC;
Y : out STD_LOGIC);
end EXNORGATE;
architecture Behavioral of EXNORGATE is
begin
Y<= A XNOR B;
end Behavioral;
Observation/ Analysis
RTL schematic of EX-OR Gate

 
 RTL schematic of EX-NOR Gate
Results:
EX-OR GATE SIMULATION


EX-NOR GATE SIMULATION
 

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