Experiment No.-2
Aim: Synthesis and simulation of AND and NAND gate
Apparatus Used:-
S.No
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Items
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Specification
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Quantity
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1
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Computer set
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P-4, 2GB DDR
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01
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2
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Software (Tool)
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Xilinx 10.1
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01
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Theory:-
AND Gate:
The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind that this dot is sometimes omitted i.e. AB
NAND Gate:
This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion
HDL Coding:
AND Gate implementation:-
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity ANDGATE is
Port ( A : in STD_LOGIC;
B : in STD_LOGIC;
Y : out STD_LOGIC);
end ANDGATE;
architecture Behavioral of ANDGATE is
begin
Y<= A AND B;
end Behavioral;
NAND Gate implementation:-
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity NANDGATE is
Port
( A : in STD_LOGIC;
B : in STD_LOGIC;
Y : out STD_LOGIC);
end NANDGATE;
architecture Behavioral of NANDGATE is
begin
Y<= A NAND B;
end
Behavioral;
RTL schematic of AND Gate
RTL schematic of NAND Gate
Results:

AND GATE SIMULATION
NAND GATE SIMULATION







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